The present invention relates to a method for packaging an external circuit of a substrate provided with an amorphous semiconductor layer, for example, a two-dimensional image detector for detecting an electromagnetic wave image including radiation such as an X-ray, a visible ray, and an infrared ray, and the present invention further concerns a thermocompression bonding apparatus used for the method.
Conventionally, a two-dimensional image detector for radiation has been known, in which semiconductor sensors for generating electrical charge (electron-hole pair) by detecting an X-ray, namely, semiconductor sensors constituted by semiconductor layers, pixel electrodes and others with photoconductivity are two-dimensionally disposed (row and column directions), each pixel electrode is provided with a switching element, the switching elements are successively turned on for each row, and electrical charge of the sensors is read for each column.
A specific construction and principle of such a two-dimensional image detector are described in xe2x80x9cD. L. Lee, et al., xe2x80x98A New Digital Detector for Projection Radiographyxe2x80x99, SPIE, 2432, pp. 237-249, 1995xe2x80x9d, xe2x80x9cL. S. Jeromin, et al., xe2x80x98Application of a-Si Active-Matrix Technology in a X-ray Detector Panelxe2x80x99, SID 97 DIGEST, pp. 91-94, 1997xe2x80x9d, and Japanese Laid-Open Patent Publication No. 342098/1994 (Tokukaihei 6-342098, published on Dec. 13, 1994).
The following explanation discusses the construction and principle of a conventional two-dimensional image detector for radiation.
FIG. 11 is a schematic diagram showing the construction of the conventional two-dimensional image detector for radiation. Further, FIG. 12 is a schematic diagram showing a sectional structure for one pixel of the two-dimensional image detector for radiation.
As shown in FIGS. 11 and 12, the two-dimensional image detector for radiation is provided with an active-matrix substrate 56. Electrode wires (a gate electrode group 64 composed of gate electrodes G1, G2, G3, . . . , Gn, and a source electrode group 65 composed of source electrodes S1, S2, S3, . . . , Sn) in an XY matrix form, a TFT (thin film transistor) 69, and a storage capacitor(Cs) 70, and others are formed on virtually the entire surface of the active-matrix substrate 56. Input/output terminals are formed on a surrounding part (not shown) of the active-matrix substrate 56. Further, a photoconductive film 52, a dielectric layer 68, and an upper electrode 66 are formed on virtually the entire surface of the active-matrix substrate 56.
The storage capacitor 70 has a construction in which a Cs electrode 74 is opposed via an insulating film 73 to a pixel electrode 72 connected to a drain electrode of the TFT 69.
As the photoconductive film 52 (amorphous semiconductor layer), a semiconducting material is used, which generates electrical charge (electron-hole pair) by exposure to radiation such as an X-ray. According to the aforementioned literatures, it is possible to adopt an organic substance such as a photoconductive polymer, which exerts photoconductivity by adding an X-ray absorbing compound, as well as amorphous-selenium (hereinafter, referred to as a-Se), lead monoxide, cadmium sulfide, and mercuric iodide. The photoconductive film 52 is formed with, for example, a thickness of 300 to 600 xcexcm by using a vacuum evaporation method.
Further, an active-matrix substrate formed in a manufacturing process of a liquid crystal display device can be applicable as the active-matrix substrate 56. For example, the active-matrix substrate used for an active-matrix liquid crystal display device (AMLCD: Active Matrix LCD) is provided with a TFT made of a material such as amorphous silicon(a-Si) and polysilicon(p-Si), an XY matrix electrode, and a storage capacitor. Therefore, only a few changes in arrangement allows the active-matrix substrate to be adopted for the two-dimensional image detector for radiation.
The following explanation describes a principle of operations of the two-dimensional image detector for radiation having the above construction.
When radiation is emitted to the photoconductive film 52, electrical charge (electron-hole pair) is generated in the photoconductive film 52. As shown FIGS. 11 and 12, the photoconductive film 52 and the storage capacitors 70 are electrically connected in series. Thus, when voltage is applied between the upper electrode 66 and the Cs electrode 74 in the two-dimensional image detector for radiation, electrical charge (electron-hole pair) generated in the photoconductive film 52 moves to a positive electrode side and a negative electrode side. As a result, the storage capacitors 70 store electrical charge. Further, a carrier blocking layer 71 composed of a thin insulating layer is formed between the photoconductive film 52 and the storage capacitors 70. The carrier blocking layer 71 prevents electrical charge from being injected from only one of the photoconductive film 52 and the storage capacitors 70.
With the above-mentioned effect, the TFTs 69 come into an open state in response to input signals of gate electrodes G1, G2, G3, . . . , Gn, so that the electrical charge stored in the storage capacitors 70 can be applied from the source electrodes S1, S2, S3, . . . , Sn to the outside. The electrode group 64 including the gate electrodes G1, G2, G3, . . . , Gn, the source electrode group 65 including the source electrodes S1, S2, S3, . . . , Sn, the TFTs 69, and the storage capacitors 70 and others are formed in a XY matrix form. Therefore, it is possible to obtain two-dimensional image information of an X-ray by successively scanning signals inputted to gate electrodes G1, G2, G3, . . . , Gn, for each of the gate electrodes.
The above two-dimensional image detector is provided with a xe2x80x9cdriving circuitxe2x80x9d (driving IC) for supplying driving voltage of a switching element (TFT) to the gate electrode group 64 and the source electrode group 65, and a xe2x80x9creading circuitxe2x80x9d (reading IC) for reading image information, on the surrounding part of the active-matrix substrate 56. These circuits are packaged mainly in line with TCP (Tape Carrier Package) method and COG (Chip on Glass) method.
FIG. 13(a) shows an example of a conventional packaging according to TCP method. In TCP method, a wiring pattern made of aluminum foil is formed on a TCP substrate 59 including a base film made of a material such as polyimide, one end of an external circuit, on which electrical members such as a driving IC 60 and an IC 61 are mounted, is connected to a surrounding area of the active-matrix substrate 56 constituting the two-dimensional image detector for radiation, and the other end of the circuit is connected to an external circuit substrate (PWB: Printed Wiring Board) 62.
Further, FIG. 13(b) shows an example of a conventional packaging according to COG method. In COG method, the driving IC 60 and the reading IC 61 are mounted and connected as external circuits directly to the input/output terminals of the active-matrix substrate 56 constituting the two-dimensional image detector for radiation. Here, power supply and the input and output of signals are carried out by an FPC (Flexible Printed Circuit) substrate 67. One end of the FPC substrate 67 is connected to the input/output terminals (not shown) of the surrounding part on the active-matrix substrate 56 constituting the two-dimensional image detector, the end is electrically connected to the driving IC 60 and the reading IC 61 via the gate electrodes G1, G2, G3, . . . , Gn (gate electrode group 64) and the source electrodes S1, S2, S3, . . . , Sn (source electrode group 65) of the active-matrix substrate 56, and the other end of the FPC substrate 67 is connected to the external circuit substrate 62. As a variation of COG method, the driving IC 60 and the reading IC 61 can be formed in a monolithic manner upon manufacturing the active-matrix substrate 56.
Among the above packaging methods, as for connection between the TCP substrate 59 and the active-matrix substrate 56 (TCP connection), connection between the driving IC 60 or the reading IC 61 and the active-matrix substrate 56 (COG connection), connection between the FPC substrate 67 and the active-matrix substrate 56 (FPC connection), and in other cases, an anisotropic conductive adhesive is generally adopted and is subjected to a thermocompression bonding on bonding parts 58.
The anisotropic conductive adhesive is formed by evenly dispersing conductive particles into resin (binder) having adhesion. A paste type and a film type are available. As a special adhesive, a conductive material is formed into columns in a bonding film. As the binder used for the anisotropic conductive adhesive, a thermosetting resin and a thermoplastic resin are generally adopted. Table 1 shows the connecting conditions of representative anisotropic conductive adhesives.
According to Table 1, in the case of the anisotropic conductive adhesive using the conventional thermosetting and thermoplastic resins, when adhesion and conduction are achieved by performing a thermosetting reaction or a thermoplastic operation on the above resins while pressurizing, a heating operation of (150xc2x0 C. or more)xc3x97(5 to 30 seconds) is normally required.
Therefore, regarding the external circuits packaged in the conventional two-dimensional image detector for radiation, when the driving IC 60 and the reading IC 61 are packaged on a surrounding part of the active-matrix substrate 56 by using TCP method and COG method, heat is applied from the outside to exert the adhesion and conduction of the anisotropic conductive adhesive, and the heat is conducted via the active-matrix substrate 56 to the photoconductive film 52 formed on the active-matrix substrate 56, particularly to a part of the photoconductive film 52 in the vicinity of an image pick-up area.
However, conventionally, the above-mentioned problem has not been considered at all. Any solutions have not been provided, particularly for the problem occurring in a case where an a-Se film made of an amorphous semiconducting material is used for the photoconductive film 52 and heat is conducted to the photoconductive film 52. After due consideration by the applicant et al. of the present invention, it is understood that heat conducted to the a-Se film causes the following inconvenience.
Generally, the a-Se film formed by evaporation at 70-80xc2x0 C. or less is amorphous and has high dark resistance of about 1012 xcexa9cm; thus, the a-Se film has proper characteristics for the two-dimensional image detector. However, when heat is applied at 70-80xc2x0 C. or more after the film is formed, the dark resistance decreases to a minimum of about 105 xcexa9cm. This is because the crystallization of the amorphous a-Se film is developed by heat.
Generally, in the two-dimensional image detector for radiation, the a-Se film is used as the photoconductive film 52. One of the reasons is that an image signal with excellent sensitivity to an X-ray (S/N ratio) can be obtained because of its high dark resistance. Therefore, dark resistance reduced by heat is a critical problem to the two-dimensional image detector for radiation.
Moreover, when crystallization of the a-Se film is developed by heating, due to a change in volume according to a phase change, the a-Se film is likely to be exfoliated from the active-matrix substrate 56, and other mechanical problems occur.
Here, when the used photoconductive film has photoconductivity to a visible ray and an infrared ray as well as radiation such as an X-ray, the two-dimensional image detector for radiation also acts as a two-dimensional image detector for a visible ray and an infrared ray. For instance, the a-Se film has favorable photoconductivity to a visible ray, and a high-sensitivity image sensor with the a-Se film has been developed by using an avalanche effect obtained by applying a high electric field. Thus, it is advantageous to avoid the aforementioned problems in developing kinds of substrates provided with the a-Se films.
In order to avoid such a problem, the following method can be adopted: the driving IC and the reading IC are packaged on the active-matrix substrate before the a-Se film is formed by TCP method and COG method, and the a-Se film is formed on the active-matrix substrate at room temperature.
However, it is necessary to provide a step of installing the active-matrix substrate, on which the driving IC and the reading IC are packaged, into a vacuum chamber, and depositing the a-Se film. Thus, during the step, the driving IC and the reading IC are more likely to be damaged. Further, when the a-Se film is formed by an automatic mass-producing apparatus, a special system for transporting the substrate is necessary to prevent damage on the driving IC and the reading IC.
Further, in this method, the a-Se film is not formed on the active-matrix substrate in the step of packaging the driving IC and the reading IC; thus, a surface of the active-matrix substrate is likely to be contaminated by an organic substance and moisture. Therefore, when a surface of the active-matrix substrate is contaminated, an adhesion defect may occur on the a-Se film formed after the packaging step.
Furthermore, when a defect is found on the driving IC and the reading IC, a re-packaging step (rework) is necessary for replacing the TCP, the COG, and others. However, when a defect is found after the a-Se film is formed, heat applied during the rework packaging is conducted to the a-Se film. Consequently, the above-mentioned method for forming the a-Se film at room temperature after packaging cannot carry out the rework packaging without causing degradation in characteristics of the a-Se film.
The objective of the present invention is to provide an external circuit packaging method, which does not cause exfoliation of an amorphous semiconductor layer and degradation in characteristics thereof in a case where external circuits are disposed on input/output terminals of a substrate including the amorphous semiconductor layer, and to provide a thermocompression bonding apparatus used for the method.
In order to achieve the above objective, the external circuit packaging method of the present invention, in which the external circuits are packaged by thermocompression bonding onto the input/output terminals of the substrate including the amorphous semiconductor layer, is characterized in that the amorphous semiconductor layer maintains a temperature below a crystallizing temperature thereof during the thermocompression bonding.
According to this method, even when the external circuits are packaged onto the input/output terminals of the substrate by a conventional thermocompression bonding method such as TCP method and COG method, it is possible to prevent crystallization from deteriorating characteristics such as high dark resistance of the amorphous semiconductor layer. This method therefore makes it possible to prevent exfoliation resulted from a change in volume according to a phase change of the amorphous semiconductor layer and to prevent deterioration in characteristics such as high dark resistance of the amorphous semiconductor layer. Further, with this method, the external circuits are packaged onto the substrate including the amorphous semiconductor layer, so that it is possible to prevent a variety of problems caused by forming the amorphous semiconductor layer after packaging the external circuits, and in the event of a defect on the external circuits such as a driving IC and a reading IC, it is possible to prevent exfoliation of the amorphous semiconductor layer and deterioration in characteristics thereof during a re-packaging operation. Consequently, according to this method, regardless of whether a packaging or a re-packaging, it is possible to provide an external circuit packaging method which does not cause exfoliation of the amorphous semiconductor layer and deterioration in characteristics thereof, upon packaging the external circuits by thermocompression bonding onto the input/output terminals of the substrate including the amorphous semiconductor layer.
The external circuit packaging method of the present invention performs a cooling operation on, for example, at least a) a part between the amorphous semiconductor layer and a thermocompression bonding part disposed between the external circuits and the input/output terminals on the substrate and/or b) a part of the amorphous semiconductor layer in the vicinity of the input/output terminals, in order to maintain a temperature of the amorphous semiconductor layer below a crystallizing temperature thereof during a thermocompression bonding.
With this method, a cooling operation is performed on at least the part between the amorphous semiconductor layer and the thermocompression bonding part disposed between the external circuits and the input/output terminals on the substrate, so that the cooling operation is performed from the thermocompression bonding part to the amorphous semiconductor layer. Therefore, most of heat can be removed before the heat is conducted from the thermocompression bonding part to the amorphous semiconductor layer. Hence, in this case, it is possible to further efficiently suppress heat conduction from the thermocompression bonding part to the amorphous semiconductor layer. Consequently, it is possible to efficiently suppress an increase in temperature of the amorphous semiconductor layer so as to maintain a temperature thereof below a crystallizing temperature thereof during the thermocompression bonding.
Moreover, a cooling operation is performed on at least the part of the amorphous semiconductor layer in the vicinity of the input/output terminals so as to cool a starting point of heat conduction on the amorphous semiconductor layer, the heat being conducted from the thermocompression bonding part. Thus, it is possible to suppress an increase in temperature of the amorphous semiconductor layer, that is caused by heat conducted from the thermocompression bonding part. In the part of the amorphous semiconductor layer in the vicinity of the input/output terminals, the cooling operation is particularly effective in the case of a short distance between the input/output terminals and the amorphous semiconductor layer on the substrate. A cooling operation is performed on the part of the amorphous semiconductor layer in the vicinity of the input/output terminals, so that it is possible to suppress the cooling effect on the thermocompression bonding part so as to efficiently perform a thermocompression bonding, and to suppress an increase in temperature of the amorphous semiconductor layer so as to maintain a temperature thereof below a crystallizing temperature thereof, even in the case of a short distance between the amorphous semiconductor layer and the input/output terminals on the substrate.
Therefore, according to this method, it is possible to provide an external circuit packaging method which does not cause exfoliation of the amorphous semiconductor layer and the deterioration in characteristics thereof upon packaging the external circuits onto the input/output terminals on the substrate including the amorphous semiconductor layer.
Further, the external circuit packaging method of the present invention can be also arranged such that a cooling and/or heat-dissipating operation is performed on an area of a substrate placement part, that corresponds to at least a) the part between the amorphous semiconductor layer and the thermocompression bonding part disposed between the external circuits and the input/output terminals on the substrate and/or b) the part of the amorphous semiconductor layer in the vicinity of the input/output terminals, in order to maintain a temperature of the amorphous semiconductor layer below a crystallizing temperature thereof during a thermocompression bonding, the substrate placement part being provided with the substrate thereon during the thermocompression bonding.
In this case, the substrate subjected to a thermocompression bonding is placed on the substrate placement part such that a surface of the substrate and a surface of the substrate placement part are in parallel with each other. Only this arrangement makes it possible to suppress an increase in temperature of the amorphous semiconductor layer by cooling and/or dissipating heat on the substrate placement part, so that a temperature of the amorphous semiconductor layer can be simply and efficiently maintained below a crystallizing temperature thereof.
In order to achieve the aforementioned objective, a thermocompression bonding apparatus of the present invention, in which a thermocompression bonding member is provided and the external circuits are packaged by thermocompression bonding onto the input/output terminals on the substrate including the amorphous semiconductor layer, is characterized by including a cooling/heat-dissipating mechanism for cooling and/or dissipating heat on at least a) the part between the amorphous semiconductor layer and the thermocompression bonding part disposed between the external circuits and the input/output terminals and/or b) the part of the amorphous semiconductor layer in the vicinity of the input/output terminals, during a thermocompression bonding.
According to this arrangement, the cooling/heat-dissipating mechanism cools and/or dissipates heat on the part between the amorphous semiconductor layer and the thermocompression bonding part disposed between the input/output terminals and the external circuits, or the part of the amorphous semiconductor layer in the vicinity of the input/output terminals during the thermocompression bonding; thus, it is possible to suppress an increase in temperature of the amorphous semiconductor layer, that is caused by heat conducted from the thermocompression bonding part. Hence, during the thermocompression bonding, a temperature of the amorphous semiconductor layer can be maintained below a crystallizing temperature thereof. Consequently, this arrangement makes it possible to provide the thermocompression bonding apparatus, in which the external circuits are packaged by thermocompression bonding without causing exfoliation of the amorphous semiconductor layer and deterioration in characteristics thereof, upon packaging the external circuits by thermocompression bonding onto the input/output terminals on the substrate including the amorphous semiconductor layer, namely, it is possible to provide the thermocompression bonding apparatus used for the external circuit packaging method of the present invention.
In order to solve the aforementioned problem, the thermocompression bonding apparatus of the present invention is further provided with the substrate placement part for placing the substrate thereon. The cooling/heat-dissipating mechanism can be also arranged such that a cooling and/or heat-dissipating operation is performed on the substrate placement part so as to cool and/or dissipate heat on a) the part between the amorphous semiconductor layer and the thermocompression bonding part disposed between the input/output terminals and the external circuits and/or b) the part of the amorphous semiconductor layer in the vicinity of the input/output terminals.
According to this arrangement, the substrate subjected to a thermocompression bonding is disposed such that the surface of the substrate and the surface of the substrate placement part are in parallel with each other. Only this arrangement makes it possible to suppress an increase in temperature of the amorphous semiconductor layer formed on the substrate, by cooling and dissipating heat on the substrate placement part. Hence, it is possible to simply and efficiently maintain a temperature of the amorphous semiconductor layer below a crystallizing temperature thereof.